Taylor University   HENA CDR   July 9 & 10 1997

PHA Register Map



00002 JAM PHA Scalers Write with no data
00004 Switch RAM Buffers Write with no data
00006 Ref- Write stacked discriminator lower reference (8 bits)
00008 Ref+ Write stacked discriminator upper reference (8 bits)
0000A Setup Register Write setup register (8 bits)
0000C Alert Write with no data
Setup register = 010L 0000 where L = 0 for linear mode and 1 for log

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Slide 36 of 42